Memory Design:

Fast Error-Correcting Circuits for Fault-Tolerant Flash Memory.
Elaine Ou and Woodward Yang. Proc. of IEEE International Workshop on Memory Technology, Design, and Testing. San Jose, Calif, August 2004

Asynchronous VLSI:

Energy-delay tradeoffs involving voltage scaling in synchronous and asynchronous systems.
Elaine Ou, Mika Nyström. Proc. of Fourth Asynchronous Circuit Design Working Group Workshop. Turku, Finland, June 2004

An Eight-bit Digital Divider Implemented in Asynchronous Pulse Logic
Mika Nyström, Elaine Ou, Alain Martin. Proc. of Tenth IEEE Interational Symposium on Asynchronous Circuits and Systems. Hersonissos, Crete, April 2004

The Lutonium: A Sub-Nanojoule Asynchronous 8051 Microcontroller
Proc. of Ninth IEEE International Symposium on Asynchronous Circuits and Systems. Vancouver, BC, May 2003

Optimization and Generation of Asynchronous Read-Only Memory
Elaine Ou, Mika Nyström, Alain Martin. Caltech CSTR, November 2002

My Senior thesis: Automating the Generation of Asynchronous Layout

Patent Applications

Asynchronous Error-Correcting Circuits for High Density Memory
Elaine Ou, Woodward Yang

Past Groups:

June 2001-September 2001: JPL Virtual Environments Lab

June 2000-September 2000: Caltech IC Group

June 1999-September 1999: Micro Photonics Devices Group